PLL130-08 Datasheet (PhaseLink Corporation) - High Speed Translator Buffer to PECL

PLL130-08, High Speed Translator Buffer to PECL

The PLL130-08 is a low cost, high performance, high speed, buffer that reproduces any input frequency from DC to 1.0GHz.

It provides a pair of differential PECL output.

Any input signal with at least 100mV swing can be used as reference signal.

This chip is ideal for conversion from sine wave, TTL,

PLL130-08 Features

* Differential PECL output Single AC coupled input (min. 100mV swing). Input range from DC to 1.0 GHz. 2.5V to 3.3V operation. Available in 8-Pin SOIC or 3x3mm QFN. PIN CONFIGURATION (TOP VIEW) GND REF_IN GND PECL 1 2 3 4 8 7 6 5 VDD GND PECL_BAR V