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NLX1G125 Non-Inverting 3-State Buffer

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Description

NLX1G125 Non-Inverting 3-State Buffer The NLX1G125 is an advanced high *speed 2 *input CMOS non *inverting 3 *state buffer.

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Features

* http://onsemi. com MARKING DIAGRAM 5 PIN FLIP
* CHIP CASE 499BG A1 XXXX A Y WW = Specific Device Code = Assembly Location = Year = Work Week XXXX AYWW
* High Speed: tPD = 2.7 ns (Typ) @ VCC = 5.0 V Designed for 1.65

Applications

* and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,

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