NB3RL02 - Low Phase-Noise Two-Channel Clock Fanout Buffer

ON Semiconductor

NB3RL02 Datasheet Preview — Preview of NB3RL02 PDF

Datasheet Details

Part number	NB3RL02
Manufacturer	ON Semiconductor ↗
File Size	277.47 KB
Description	Low Phase-Noise Two-Channel Clock Fanout Buffer
Datasheet	NB3RL02_ONSemiconductor.pdf

NB3RL02 Product details

Description

Ball No. Ground O Clock output 2 Table 2. FUNCTION TABLE Inputs CLK_REQ1 CLK_REQ2 L L L H H L H H MCLK_IN X CLK CLK CLK CLK_OUT1 L L CLK CLK Outputs CLK_OUT2 L C

Features

Low Additive Noise:.
149 dBc/Hz at 10 kHz Offset Phase Noise.
0.37 ps (rms) Output Jitter.
Limited Output Slew Rate for EMI Reduction (1 ns to 5 ns/Rise/Fall Time for 10.
50 pF Loads).
Regulated 1.8 V Output Supply Available for External Clock Source, ie. TCX0.
Operation to 80 MHz.
Ultra.
Small Package:.
8.
ball: 0.4 mm Pitch WLCS.
ESD Performance Exceeds JESD 22.
2000 V Human.

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Published: Dec 20, 2011 |