MC100EPT21 Datasheet (ON Semiconductor) - 3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator

MC100EPT21, 3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator

MC100EPT21 3.3V Differential LVPECL/LVDS/CML to LVTTL/LVCMOS Translator The MC100EPT21 is a Differential LVPECL/LVDS/CML to LVTTL/LVCMOS translator.

Because LVPECL (Positive ECL), LVDS, and positive CML input levels and LVTTL/LVCMOS output levels are used, only +3.3 V and ground are required.

The small outline 8 lead SOIC package makes the EPT21 ideal for applications which require the translation of a clock or data signal.

The VBB output allows this EPT21 to be cap coupled in either sin