MC100EP809 - Differential HSTL/PECL to HSTL Clock Driver

Product Overview

ON Semiconductor

Datasheet Details

Part number	MC100EP809
Manufacturer	ON Semiconductor
File Size	270.50 KB
Description	Differential HSTL/PECL to HSTL Clock Driver
Datasheet	MC100EP809 Datasheet
Additional preview pages of the MC100EP809 datasheet.

Product details

Description

The MC100EP809 is a low skew 2:1:9 differential clock driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer.The part is designed for use in low voltage applications which require a large number of outputs to drive precisely aligned low skew signals to their destination.The two clock inputs are one differential HSTL and one differential LVPECL.Both input pairs can accept LVDS levels.They are selected by the CLK_SEL pin which is LVTTL.To avoid

Features

100 ps Typical Device.
to.
Device Skew.
15 ps Typical within Device Skew.
HSTL Compatible Outputs Drive 50 W to GND with no Offset Voltage.
Maximum Frequency > 750 MHz.
850 ps Typical Propagation Delay.
Fully Compatible with Micrel SY89809L.
PECL and HSTL Mode Operating Range: VCCI = 3 V to 3.6 V with GND = 0 V, VCCO = 1.6 V to 2.0 V.
Open Input Default State.
This Device is Pb.
Free and is RoH.

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Other Datasheets by ON Semiconductor

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Published: Apr 16, 2007 |