MC100EP809 Datasheet (ON Semiconductor) - Differential HSTL/PECL to HSTL Clock Driver

MC100EP809, Differential HSTL/PECL to HSTL Clock Driver

The MC100EP809 is a low skew 2:1:9 differential clock driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer.

The part is designed for use in low voltage applications which require a large number of outputs to drive precisely aligned low skew signals

MC100EP809 Features

* 100 ps Typical Device

* to

* Device Skew

* 15 ps Typical within Device Skew

* HSTL Compatible Outputs Drive 50 W to GND with no Offset Voltage

* Maximum Frequency > 750 MHz

* 850 ps Typical Propagation Delay

* Fully Compatible with Micrel