MM54C195 - 4-Bit Registers

Product Overview

National

Datasheet Details

Part number	MM54C195
Manufacturer	National
File Size	127.26 KB
Description	4-Bit Registers
Datasheet	MM54C195 Datasheet
Additional preview pages of the MM54C195 datasheet.

Product details

Description

The MM54C195 MM74C195 CMOS 4-bit registers feature parallel inputs parallel outputs J-K serial inputs shift load control input and a direct overriding clear The following two modes of operation are possible Parallel Load Shift in direction QA towards QD Parallel loading is accomplished by applying the four bits of data and taking the shift load control of input low The data is loaded into the associated flip-flops and appears at the outputs after the positive transition of the clock input During

Features

Y Medium speed operation Y Y Y Y Y Y Y Y Y Y Y High noise immunity Low power Tenth power TTL compatible Supply voltage range Synchronous parallel load Parallel inputs and outputs from each flip-flop Direct overriding clear J and K inputs to first stage Complementary outputs from last stage Positive-edge triggered clocking Diode clamped inputs to protect against static charge 8 5 MHz (typ ) with 10V supply and 50 pF load 0 45 VCC (typ ) 100 nW (typ ) Drive 2 LPTTL loads 3V to 15V.

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Published: May 7, 2005 |