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DS90CR216 - +3.3V Rising Edge Data Strobe LVDS

Download the DS90CR216 datasheet PDF. This datasheet also covers the DS90CR215 variant, as both devices belong to the same +3.3v rising edge data strobe lvds family and are provided as variant models within a single manufacturer datasheet.

Description

The DS90CR215 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams.

A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DS90CR215_NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
DS90CR216 +3.3V Rising Edge Data Strobe LVDS Texas Instruments
DS90CR216A 3.3-V Rising Edge Data Strobe LVDS Receiver Texas Instruments
DS90CR216A-Q1 3.3-V Rising Edge Data Strobe LVDS Receiver Texas Instruments
DS90CR215 +3.3V Rising Edge Data Strobe LVDS Texas Instruments
DS90CR217 +3.3V Rising Edge Data Strobe LVDS Texas Instruments

Other Datasheets by National Semiconductor (Texas Instruments)

Part Number Description
DS90CR211 21-Bit Channel Link
DS90CR212 21-Bit Channel Link
DS90CR213 21-Bit Channel Link
DS90CR214 21-Bit Channel Link 66 MHz
DS90CR215 +3.3V Rising Edge Data Strobe LVDS

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
DS90CR215/DS90CR216 +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link-66 MHz March 1999 DS90CR215/DS90CR216 +3.3V Rising Edge Data Strobe LVDS 21-Bit Channel Link - 66 MHz General Description The DS90CR215 transmitter converts 21 bits of CMOS/TTL data into three LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fourth LVDS link. Every cycle of the transmit clock 21 bits of input data are sampled and transmitted. The DS90CR216 receiver converts the LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 66 MHz, 21 bits of TTL data are transmitted at a rate of 462 Mbps per LVDS data channel. Using a 66 MHz clock, the data throughput is 1.
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