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DS3884A - BTL Handshake Transceiver

Description

The DS3884A is one in a series of transceivers designed specifically for the implementation of high performance Futurebus+ and proprietary bus interfaces.

BTL) as specified in t

Features

  • Fast propagation delay (3 ns typ) 6-bit BTL transceiver Selective receiver glitch filtering (FR1.
  • FR3) Meets 1194.1 Standard on Backplane Transceiver Logic (BTL) n Supports live insertion n n n n n n n n Connection Diagram DS011460-1 Order Number DS3884AVF See NS Package VF44B TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 2000 National Semiconductor Corporation DS011460 www. national. com DS3884A Logic Diagram DS011460-3 www. national. com 2 DS388.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DS3884A BTL Handshake Transceiver August 2000 DS3884A BTL Handshake Transceiver General Description The DS3884A is one in a series of transceivers designed specifically for the implementation of high performance Futurebus+ and proprietary bus interfaces. The DS3884A is a BTL 6-bit Handshake Transceiver designed to conform to IEEE 1194.1 (Backplane Transceiver Logic — BTL) as specified in the IEEE 896.2 Futurebus+ specification.