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CGS64CT801 - Low Skew PLL 1-to-8 CMOS Clock Driver

Download the CGS64CT801 datasheet PDF. This datasheet also covers the CGS64C800 variant, as both devices belong to the same low skew pll 1-to-8 cmos clock driver family and are provided as variant models within a single manufacturer datasheet.

Description

These minimum skew clock drivers are designed for Clock Generation and Support (CGS) applications operating at high frequencies utilizing a phase lock loop.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CGS64C800-NationalSemiconductor.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
o ~National ~ Semiconductor PRELIMINARY eecnn;) .0...I.:.l..o..o.. CGS64/74C800/801/802, CGS64/74CT800/801/802, o0I:loo CD Q CGS/74LCT800/801/802 .Q..... CD Low Skew PLL 1-to-8 CMOS Clock Driver .Q-...... CD General Description Q ,!') These minimum skew clock drivers are designed for Clock Generation and Support (CGS) applications operating at high frequencies utilizing a phase lock loop. The phase lock loop allows for outputs to lock-on to either SyncLO or SyncL1 inputs, which could be operating at different frequencies. This product is ideal for applications requiring clock synchronization and distribution of either on or off board components.
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