54LS138 - (54LS138 / 54LS139) Decoders/Demultiplexers

Product Overview

National Semiconductor

Datasheet Details

Part number	54LS138
Manufacturer	National Semiconductor
File Size	219.59 KB
Description	(54LS138 / 54LS139) Decoders/Demultiplexers
Datasheet	54LS138 Datasheet
Additional preview pages of the 54LS138 datasheet.

Product details

Description

These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times In high-performance memory systems these decoders can be used to minimize the effects of system decoding When used with high-speed memories the delay times of these decoders are usually less than the typical access time of the memory This means that the effective system delay introduced by the decoder is negligible The LS138 decodes

Features

Y Y Y Y Y Y Y Designed specifically for high speed Memory decoders Data transmission systems LS138 3-to-8-line decoders incorporates 3 enable inputs to simplify cascading and or data reception LS139 contains two fully independent 2-to-4-line decoders demultiplexers Schottky clamped for high performance Typical propagation delay (3 levels of logic) LS138 21 ns LS139 21 ns Typical power dissipation LS138 32 mW LS139 34 mW Alternate Military Aerospace devices (54LS138 54LS139) are available C.

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Other Datasheets by National Semiconductor

54LS13 - DUAL 4-INPUT SCHMITT TRIGGER
54LS133 - 13-INPUT NAND GATE
54LS136 - QUAD 2-INPUT EXCLUSIVE-OR GATE
54LS139 - (54LS138 / 54LS139) Decoders/Demultiplexers
54LS10 - Triple 3-Input NAND Gates
54LS109 - Dual Positive-Edge-Triggered J-K Flip-Flops

Published: May 9, 2006 |