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NT5CC256M8DN - 2Gb DDR3 SDRAM D-Die

Download the NT5CC256M8DN datasheet PDF. This datasheet also covers the NT5CB512M4DN variant, as both devices belong to the same 2gb ddr3 sdram d-die family and are provided as variant models within a single manufacturer datasheet.

Description

The 2Gb Double-Data-Rate-3 (DDR3) DRAMs is a high-speed CMOS Double Data Rate32 SDRAM containing 2,147,483,648 bits.

It is internally configured as an octal-bank DRAM.

The 2Gb chip is organized as 64Mbit x 4 I/O x 8 bank and 32Mbit x 8 I/O x 8 banks .

Features

  • and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and  falling). All I/Os are synchronized with a single ended DQS or differential DQS pair in a source synchronous fashion. These devices operate with a single 1.5V ± 0.75V and 1.35V -0.0675V/+0.1V power supply and are available in BGA packages. 1 REV 1.0 02/ 2011 2Gb DDR3 SDRAM D-Die NT5CB512M4DN / NT5CB256M.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (NT5CB512M4DN-Nanya.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number NT5CC256M8DN
Manufacturer Nanya
File Size 2.25 MB
Description 2Gb DDR3 SDRAM D-Die
Datasheet download datasheet NT5CC256M8DN Datasheet

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NT5CC256M8BN 2Gb DDR3 SDRAM B-Die
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
2Gb DDR3 SDRAM D-Die NT5CB512M4DN / NT5CB256M8DN NT5CC512M4DN / NT5CC256M8DN Feature  1.5V ± 0.075V / 1.35V -0.0675V/+0.1V (JEDEC Standard Power Supply)  8 Internal memory banks (BA0- BA2)  Differential clock input (CK, )  Programmable  Latency: 5, 6, 7, 8, 9, 10,11  Programmable Additive Latency: 0, CL-1, CL-2  Programmable Sequential / Interleave Burst Type  Programmable Burst Length: 4, 8  8 bit prefetch architecture  Output Driver Impedance Control  Write Leveling  OCD Calibration  Dynamic ODT (Rtt_Nom & Rtt_WR)  Auto Self-Refresh  Self-Refresh Temperature  RoHS Compliance and Halogen free  Packages: 78-Ball BGA for x4 & x8 components Description The 2Gb Double-Data-Rate-3 (DDR3) DRAMs is a high-speed CMOS Double Data Rate32 SDRAM containing 2,147,483,648 bits.
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