NT5CC128M8FN - 1Gb SDRAM

Product Overview

Nanya

Part number	NT5CC128M8FN
Manufacturer	Nanya
File Size	3.20 MB
Description	1Gb SDRAM
Datasheet	NT5CC128M8FN Datasheet
Note	This datasheet PDF includes multiple part numbers: NT5CC128M8FN, NT5CB128M8FN. Please refer to the document for exact specifications by model.
Additional preview pages of the NT5CC128M8FN datasheet.

The 1Gb Double-Data-Rate-3 (DDR3(L)) F-die DRAMs is double data rate architecture to achieve high-speed operation.

JEDEC DDR3 Compliant - 8n Prefetch Architecture - Differential Clock(CK/) and Data Strobe(DQS/) - Double-data rate on DQs, DQS and DM.
Data Integrity - Auto Self Refresh (ASR) by DRAM built-in TS - Auto Refresh and Self Refresh Modes.
Power Saving Mode - Partial Array Self Refresh (PASR)1 - Power Down Mode.
Signal Integrity - Configurable DS for system compatibility - Configurable On-Die Termination - ZQ Calibration for DS/ODT impedance accuracy via external ZQ pad (2.

📁 Similar Datasheet

Other Datasheets by Nanya

Published: Feb 24, 2015 |