NT5DS16M8AW - (NT5DSxxMxAx) 128Mb DDR333/300 SDRAM

Nanya Technology

Datasheet Details

Part number	NT5DS16M8AW
Manufacturer	Nanya Technology
File Size	454.50 KB
Description	(NT5DSxxMxAx) 128Mb DDR333/300 SDRAM
Datasheet	NT5DS16M8AW_NanyaTechnology.pdf

The 128Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 134,217,728 bits.

CAS Latency and Frequency Maximum Operating Frequency (MHz).
DDR333 DDR300 (-6) (-66) 2 133 133 2.5 166 150.
Values are nominal (exact tCK should be used). CAS Latency.
Double data rate architecture: two data transfers per clock cycle.
Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver.
DQS is edge-aligned with data for reads and is centeraligned with data for writes.
Differential clock.

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Published: Sep 24, 2006 |