PUMH7 Datasheet - NXP

PUMH7 NPN/NPN resistor-equipped transistors

emitter base collector TR1; TR2 TR1; TR2 TR1; TR2 DESCRIPTION NPN resistor-equipped double transistor in an SC-88 (SOT363) plastic package. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL Per transistor VCBO VCEO VEBO IO ICM Ptot Tstg Tj Tamb Per device Ptot.

PUMH7 Features

* Transistors with built-in bias resistor R1 (typ. 4.7 kΩ)

* No mutual interference between the transistors

* Simplification of circuit design

* Reduces number of components and board space. APPLICATIONS

* Especially suitable for space reduction in interface a

PUMH7 Datasheet (63.53 KB)