Description
7 Peripheral operating requirements and behaviors 21
3.2 Format7
7.1 External oscillator (XOSC) and ICS characteristics21
3.3 Fields
Features
- 8-Bit S08 central processor unit (CPU).
- Up to 20 MHz bus at 2.7 V to 5.5 V across operating temperature range.
- Supporting up to 30 interrupt/reset sources.
- Supporting up to four-level nested interrupt.
- On-chip memory.
- Up to 1 KB random-access memory (RAM).
- Flash and RAM access protection.
- Power-saving modes.
- One low power stop mode; reduced power wait mode.
- Peripheral clock enable register can disable cloc.
MC9S08PL16S-NXP.pdf
