74LVC573A Datasheet - NXP

74LVC573A Octal D-type transparent latch

The 74LVC573A consists of eight D-type transparent latches, featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A Latch Enable (LE) input and an Output Enable (OE) input are common to all internal latches. When LE is HIGH, data at the Dn inputs ent.

74LVC573A Features

* 5 V tolerant inputs/outputs, for interfacing with 5 V logic

* Supply voltage range from 1.2 V to 3.6 V

* CMOS low power consumption

* Direct interface with TTL levels

* High-impedance when VCC = 0 V

* Flow-through pinout architecture

* Complies with JEDEC standard:

74LVC573A Datasheet (153.31 KB)