Datasheet4U.com

74LVC2G126 - Dual bus buffer/line driver

NXP

📥 Download Datasheet

74LVC2G126 Datasheet Preview — Preview of 74LVC2G126 PDF

datasheet Preview Page 2

datasheet Preview Page 3

Datasheet Details

Part number	74LVC2G126
Manufacturer	NXP
File Size	172.50 KB
Description	Dual bus buffer/line driver
Datasheet	74LVC2G126_PhilipsSemiconductors.pdf

74LVC2G126 Product details

Description

The 74LVC2G126 is a dual non-inverting buffer/line driver with 3-state outputs.

Features

Wide supply voltage range from 1.65 V to 5.5 V.
5 V tolerant input/output for interfacing with 5 V logic.
High noise immunity.
Complies with JEDEC standard:.
JESD8-7 (1.65 V to 1.95 V).
JESD8-5 (2.3 V to 2.7 V).
JESD8-B/JESD36 (2.7 V to 3.6 V).
ESD protection:.
HBM JESD22-A114F exceeds 2000 V.
MM JESD22-A115-A exceeds 200 V.
24 mA output drive (VCC = 3.0 V).
CMOS low power consumption.
Latch-up performance exceeds 250 mA.
Di.

📁 74LVC2G126 Similar Datasheet

74LVC2G14-Q100 - Dual inverting Schmitt trigger (nexperia)
74LVC2G16 - Dual buffer gate (nexperia)
74LVC2G17-Q100 - Dual non-inverting Schmitt trigger (nexperia)
74LVC2G00 - DUAL 2-INPUT NAND GATE (Diodes)
74LVC2G02 - DUAL 2-INPUT NOR GATE (Diodes)
74LVC2G02-Q100 - Dual 2-input NOR gate (nexperia)
74LVC2G04 - Dual inverter (nexperia)
74LVC2G04-Q100 - Dual inverter (nexperia)

Other Datasheets by NXP

74LVC2G126-Q100 - Bus buffer/line driver
74LVC2G125 - Dual bus buffer/line driver
74LVC2G125-Q100 - Dual bus buffer/line driver
74LVC2G14 - Dual inverting Schmitt-trigger
74LVC2G17 - Dual non-inverting Schmitt-trigger
74LVC2G00-Q100 - Dual 2-input NAND gate

Published: Mar 22, 2005 |