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74HCT377 - Octal D-type flip-flop

Download the 74HCT377 datasheet PDF (74HC377 included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for octal d-type flip-flop.

Description

The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop.

Features

  • Common clock and master reset.
  • Eight positive edge-triggered D-type flip-flops.
  • Complies with JEDEC standard no. 7A.
  • Input levels:.
  • For 74HC377: CMOS level.
  • For 74HCT377: TTL level.
  • ESD protection:.
  • HBM JESD22-A114F exceeds 2000 V.
  • MM JESD22-A115-A exceeds 200 V.
  • Multiple package options.
  • Specified from 40 C to +85 C and from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature rang.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (74HC377-NXP.pdf) that lists specifications for multiple related part numbers.

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Full PDF Text Transcription

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74HC377; 74HCT377 Octal D-type flip-flop with data enable; positive-edge trigger Rev. 3 — 25 September 2013 Product data sheet 1. General description The 74HC377; 74HCT377 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and data enable (E) inputs. When E is LOW, the outputs Qn assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. Input E must be stable one set-up time prior to the LOW-to-HIGH transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2.
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