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74ALVC374 - Octal D-type flip-flop positive edge-trigger

74ALVC374 Description

INTEGRATED CIRCUITS DATA SHEET 74ALVC374 Octal D-type flip-flop; positive edge-trigger; 3-state Product speciļ¬cation File under Integrated Circuits,.
74ALVC374 The 74ALVC374 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL familie.

74ALVC374 Features

* Wide supply voltage range from 1.65 to 3.6 V
* Complies with JEDEC standard: JESD8-7 (1.65 to 1.95 V) JESD8-5 (2.3 to 2.7 V) JESD8B/JESD36 (2.7 to 3.6 V).
* 3.6 V tolerant inputs/outputs
* CMOS LOW power consumption
* Direct interface with TTL levels (2.7 to

74ALVC374 Applications

* A clock (CP) input and an output enable (OE) input are common to all flip-flops. The eight flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOW-to-HIGH CP transition. When OE is LOW, the contents of the eight flip-flops is availabl

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Octal D-type flip-flop positive edge-trigger NXP
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