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74AHCT259 - 8-bit addressable latch

General Description

The 74AHC/AHCT259 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL).

They are specified in compliance with JEDEC standard No.

7A.

Key Features

  • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V.
  • Balanced propagation delays.
  • All inputs have Schmitt-trigger actions.
  • Combines demultiplexer and 8-bit latch.
  • Serial-to-parallel capability.
  • Output from each storage bit available.
  • Random (addressable) data entry.
  • Easily expandable.
  • Common reset input.
  • Useful as a 3-to-8 active HIGH d.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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INTEGRATED CIRCUITS DATA SHEET 74AHC259; 74AHCT259 8-bit addressable latch Product specification File under Integrated Circuits, IC06 2000 Mar 14 Philips Semiconductors Product specification 8-bit addressable latch FEATURES • ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V • Balanced propagation delays • All inputs have Schmitt-trigger actions • Combines demultiplexer and 8-bit latch • Serial-to-parallel capability • Output from each storage bit available • Random (addressable) data entry • Easily expandable • Common reset input • Useful as a 3-to-8 active HIGH decoder • Inputs accept voltages higher than VCC • For AHC only: operates with CMOS input levels • For AHCT only: operates with TTL input levels • Specifi