Description
The 74ABT843 Bus interface latch is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity.
Features
- High speed parallel latches.
- Extra data width for wide address/data paths or buses carrying
parity.
- Ideal where high speed, light loading, or increased fan-in are
required with MOS microprocessors.
- Slim DIP 300 mil package.
- Broadside pinout.
- Output capability: +64mA/.
- 32mA.
- Latch-up protection exceeds 500mA per Jedec Std 17.
- ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model.
74ABT843_PhilipsSemiconductors.pdf
