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74ABT02 - Quad 2-input NOR gate

Description

µA PIN NUMBER 2, 3, 5, 6, 8, 9, 11, 12 1, 4, 10, 13 SYMBOL An-Bn Yn GND VCC NAME AND FUNCTION Data inputs Data outputs Ground (0V) Positive supply voltage PIN CONFIGURATION Y0 A0 B0 Y1 A1 B1 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC Y3 B3 A3 Y2 B2 A2 7 14 LOGIC SYMBOL (IEEE/IEC) 2 3 1 1 SA00337

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INTEGRATED CIRCUITS 74ABT02 Quad 2-input NOR gate Product specification IC24 Data Handbook 1995 Sep 18 Philips Semiconductors Philips Semiconductors Product specification Quad 2-input NOR gate 74ABT02 QUICK REFERENCE DATA SYMBOL PARAMETER Propagation delay An or Bn to Yn Output to Output skew Input capacitance Total supply current VI = 0V or VCC Outputs disabled; VCC = 5.5V CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT LOGIC DIAGRAM A0 B0 A1 B1 2 3 5 6 8 9 11 12 13 1 Y0 4 Y1 tPLH tPHL tOSLH tOSHL CIN ICC CL = 50pF; VCC = 5V 2.4 1.8 ns A2 B2 VCC = Pin 14 GND = Pin 7 A3 B3 10 Y2 0.
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