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PX1011B - PCI Express stand-alone X1 PHY

Description

The PX1011B is a high-performance, low-power, single-lane PCI Express electrical PHYsical layer (PHY) that handles the low level PCI Express protocol and signaling.

The PX1011B PCI Express PHY is compliant to the PCI Express Base Specification, Rev.

1.0a, and Rev.

Features

  • 2.1 PCI Express interface.
  • Compliant to PCI Express Base Specification 1.1.
  • Single PCI Express 2.5 Gbit/s lane.
  • Data and clock recovery from serial stream.
  • Serializer and De-serializer (SerDes).
  • Receiver detection.
  • 8b/10b coding and decoding, elastic buffer and word alignment.
  • Supports loopback.
  • Supports direct disparity control for use in transmitting compliance pattern.
  • Supports lane polarity inversion.
  • Low jitter and Bit Error Rate (BER) 2.2 P.

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Datasheet Details

Part number PX1011B
Manufacturer NXP Semiconductors
File Size 329.24 KB
Description PCI Express stand-alone X1 PHY
Datasheet download datasheet PX1011B Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PX1011B PCI Express stand-alone X1 PHY Rev. 6 — 27 June 2011 Product data sheet 1. General description The PX1011B is a high-performance, low-power, single-lane PCI Express electrical PHYsical layer (PHY) that handles the low level PCI Express protocol and signaling. The PX1011B PCI Express PHY is compliant to the PCI Express Base Specification, Rev. 1.0a, and Rev. 1.1. The PX1011B includes features such as Clock and Data Recovery (CDR), data serialization and de-serialization, 8b/10b encoding, analog buffers, elastic buffer and receiver detection, and provides superior performance to the Media Access Control (MAC) layer devices. The PX1011B is a 2.5 Gbit/s PCI Express PHY with 8-bit data PXPIPE interface.
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