74AUP1G125 Low-power buffer/line driver

NXP Semiconductors

Description

74AUP1G125 Low-power buffer/line driver; 3-state Rev.02 * 30 June 2006 www.DataSheet4U.com Product data sheet 1.General .
The 74AUP1G125 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

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Datasheet Specifications

Part number: 74AUP1G125
Manufacturer: NXP ↗ Semiconductors
File Size: 141.24 KB
Datasheet: 74AUP1G125_NXPSemiconductors.pdf
Description: Low-power buffer/line driver

Features

* I Wide supply voltage range from 0.8 V to 3.6 V I High noise immunity I Complies with JEDEC standards: N JESD8-12 (0.8 V to 1.3 V) N JESD8-11 (0.9 V to 1.65 V) N JESD8-7 (1.2 V to 1.95 V) N JESD8-5 (1.8 V to 2.7 V) N JESD8-B (2.7 V to 3.6 V) I ESD protection: N HBM JESD22-A114-C Class 3A. Exceeds 50

Applications

* using IOFF. The IOFF circuitry disables the output, preventing the damaging backﬂow current through the device when it is powered down. The 74AUP1G125 provides the single non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH le

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74AUP1G125 Low-power buffer line driver NXP Semiconductors

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