Description
The µPD77113A and 77114 are 16-bit fixed-point digital signal processors (DSPs).
Features
- z Instruction cycle (operating clock)
µPD77113A : 13.3 ns MIN (75 MHz MAX) µPD77114 : 13.3 ns MIN (75 MHz MAX)
z Memory.
- Internal instruction memory
µPD77113A : RAM 3.5K words × 32 bits
Mask ROM 48K words × 32 bits
µPD77114 : RAM 3.5K words × 32 bits
Mask ROM 48K words × 32 bits.
- Data memory
µPD77113A : RAM 16K words × 16 bits × 2 banks
Mask ROM 32K words × 16 bits × 2 banks
µPD77114 : RAM 16K words × 16 bits × 2 banks
Mask ROM 32K words × 16 bits × 2 banks External memory.
UPD77114_NEC.pdf
