UPD44321181 - (UPD44321181 / UPD44321361) 32M-BIT ZEROSB SRAM FLOW THROUGH OPERATION

NEC

The UPD44321181 by NEC is a (UPD44321181 / UPD44321361) 32M-BIT ZEROSB SRAM FLOW THROUGH OPERATION. Below is the official datasheet preview.

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UPD44321181 (UPD44321181 / UPD44321361) 32M-BIT ZEROSB SRAM FLOW THROUGH OPERATION by NEC - Datasheet Preview — Official preview page of the **UPD44321181** (UPD44321181 / UPD44321361) 32M-BIT ZEROSB SRAM FLOW THROUGH OPERATION datasheet (NEC).

Datasheet Details

Part number	UPD44321181
Manufacturer	NEC
File Size	318.26 KB
Description	(UPD44321181 / UPD44321361) 32M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
Datasheet	UPD44321181_NEC.pdf
Additional preview pages of the UPD44321181 datasheet.

UPD44321181 Product details

Description

The µPD44321181 is a 2,097,152-word by 18-bit and the µPD44321361 is a 1,048,576-word by 36-bit ZEROSB static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell.

Features

Low voltage core supply: VDD = 3.3 ± 0.165 V / 2.5 ± 0.125 V.
Synchronous operation.
100 percent bus utilization.
Internally self-timed write control.
Burst read / write : Interleaved burst and linear burst sequence.
Fully registered inputs and outputs for flow through operation.
All registers triggered off positive clock edge.
3.3V or 2.5V LVTTL Compatible : All inputs and outputs.
Fast clock access time : 7.5 ns.

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Other Datasheets by NEC

UPD44321182 - (UPD44321182 / UPD44321362) 32M-BIT ZEROSB SRAM PIPELINED OPERATIO
UPD44321361 - (UPD44321181 / UPD44321361) 32M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
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Published: Nov 25, 2006 |