MPC9658 Datasheet (Motorola) - 3.3V 1:10 LVCMOS PLL Clock Generator

MPC9658, 3.3V 1:10 LVCMOS PLL Clock Generator

The MPC9658 utilizes PLL technology to frequency lock its outputs FA SUFFIX onto an input reference clock.

Normal operation of the MPC9658 requires 32 LEAD LQFP PACKAGE CASE 873A the connection of the QFB output to the feedback input to close the PLL feedback path (external feedback).

With the PLL l

MOTOROLA Freescale Semiconductor, Inc.

SEMICONDUCTOR TECHNICAL DATA Order Number: MPC9658/D Rev 3, 02/2003 3.3V 1:10 LVCMOS PLL Clock Generator MPC9658 The MPC9658 is a 3.3V compatible, 1:10 PLL based clock generator and zero-delay buffer targeted for high performance low-skew clock distribution in mid-range to high-performance telecom, networking and computing applications.

With output frequencies up to 250 MHz and output skews less than 120 ps the device meets the needs of the most demand