MPC949 Datasheet (Motorola) - LOW VOLTAGE 1:15 PECL TO CMOS CLOCK DRIVER

MPC949, LOW VOLTAGE 1:15 PECL TO CMOS CLOCK DRIVER

Pin Name TCLK_Sel (Int Pulldown) TCLK0:1 (Int Pullup) PCLK (Int Pulldown) PCLK (Int Pullup) Dseln (Int Pulldown) MR/OE (Int Pulldown) PCLK_Sel (Int Pulldown) Function Select pin to choose TCKL0 or TCLK1 LVCMOS/LVTTL clock inputs True PECL clock input Compliment PECL clock input 1x or 1/2x input divi

MPC949 Features

* a low voltage PECL input, in addition to its LVCMOS/LVTTL inputs, to allow it to be incorporated into larger clock trees which utilize low skew PECL devices (see the MC100LVE111 data sheet) in the lower branches of the tree. The fifteen outputs were designed and optimized to drive 50Ω series or para