MCM69P737 Datasheet (Motorola) - 128K x 36 Bit Pipelined BurstRAM Synchronous Fast Static RAM

MCM69P737, 128K x 36 Bit Pipelined BurstRAM Synchronous Fast Static RAM

Pin Locations 4B Symbol ADSC Type Input Description Synchronous Address Status Controller: Active low, interrupts any ongoing burst and latches a new external address.

Used to initiate a READ, WRITE, or chip deselect.

Synchronous Address Status Processor: Active low, interrupts any ongoing burst an

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM69P737/D 128K x 36 Bit Pipelined BurstRAM Synchronous Fast Static RAM The MCM69P737 is a 4M bit synchronous fast static RAM designed to provide a burstable, high performance, secondary cache for the PowerPC™ and other high performance microprocessors.

It is organized as 128K words of 36 bits each.

This device integrates input registers, an output register, a 2 bit address counter, and high speed SRAM onto a single monolit

MCM69P737 Features

* byte write signals SBx are being used, tie this pin low. Core Power Supply. I/O Power Supply. Ground. No Connection: There is no connection to the chip. 89 31 K LBO Input Input 32, 33, 34, 35, 44, 45, 46, 47, 48,