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MC88PL117FN - CMOS PLL CLOCK DRIVER

Features

  • t loaded at a time. Specification value for IOZ is preliminary, will be finalized upon ‘MC’ status. TIMING.

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Full PDF Text Transcription

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Not Recommended for New Designs CMOS PLL Clock Driver High Fan-Out The MC88PL117 utilizes proven phase–locked loop clock driver technology to create a large fan–out, multiple frequency and phase, low skew clock driver. The 88PL117 provides the clock frequencies necessary to drive systems using the PowerPC™ 601 microprocessor and the Pentium™ microprocessor (see applications section for details). A total of 14 high current, matched impedance outputs are available in 8 programmable output frequency and phase configurations. Output frequencies are referenced to a system frequency, Q, and are available at 2X, 1X, and 1/2X the Q frequency.
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