MC145106 Datasheet (Motorola) - PLL Frequency Synthesizer

MC145106, PLL Frequency Synthesizer

P0 * P8 Programmable Inputs (PDIP * Pins 17 * 9; SOG * Pins 19, 17 * 14, 12 * 9) Programmable divider inputs (binary).

fin Frequency Input (PDIP, SOG * Pin 2) Frequency input to programmable divider (derived from VCO).

OSCin, OSCout Oscillator

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MC145106/D PLL Frequency Synthesizer CMOS The MC145106 is a phase locked loop (PLL) frequency synthesizer constructed in CMOS on a single monolithic structure.

This synthesizer finds applications in such areas as CB and FM transceivers.

The device contains an oscillator/amplifier, a 210 or 211 divider chain for the oscillator signal, a programmable divider chain for the input signal, and a phase detector.

The MC145106 has ci

MC145106 Features

* ansceivers. The VCO operates on frequency during transmit and is offset downward during receive. The offset corresponds to the receive IF (10.7 MHz) for channels having identical receive/transmit frequencies (simplex), and is (10.7

* 4.6 = 6.1) MHz for duplex channels. Carrier modulation is