Description
Pin F Function i VRM GND OVR D7
D0 VCC(D) VEE Vin VCC(A) CLK EN EN VRB VRT P Suffix 1 2, 12 16, 22 3 4 to 10, 21 11, 17 13 14 15 18 19 20 23 24 DW Suffix 1 2, 13, 17 18, 25, 26 3 4 to 10, 24 11, 12 19, 20 14 15 16 21 22 23 27 28 D Description i i The midpoint of the reference resistor ladder.
Features
- ive than VRB by 1.3 V. Reference to analog ground. u
Signal voltage input. This voltage is compared to the reference to generate a digital equivalent. Input impedance is nominally 16 to 33K in parallel with 36 pF. Power supply for the analog section. + 5.0 V, ± 10% required. Reference to analog ground. Clock input. TTL compatible. Enable input. TTL compatible, a logic 1 (and EN at a logic 0) enables the data outputs. A logic 0 puts the outputs in a 3.
- state mode. Enable input. TTL compa.
MC10319_MotorolaInc.pdf
