ML6691 - 100BASE-T MII-to-PMD Transceiver

Product Overview

Micro Linear

Datasheet Details

Part number	ML6691
Manufacturer	Micro Linear
File Size	143.08 KB
Description	100BASE-T MII-to-PMD Transceiver
Datasheet	ML6691 Datasheet
Additional preview pages of the ML6691 datasheet.

Product details

Description

The ML6691 implements the upper portion of the physical layer for the Fast Ethernet 100BASE-T standard. accessible through the two-wire MII management interface include full duplex operation, loopback, power down mode, and MII isolation.

Features

s s s s s s s s s Conforms to the Fast Ethernet 100BASE-T IEEE 802.3µ standard Integrated 4B/5B encoder/decoder Integrated Stream Cipher scrambler/descrambler Compliant MII interface Two-wire serial interface management port for configuration and control On-chip 25 MHz crystal oscillator Interfaces to either AMD’s PDT/PDR (AM79865/79866) or Motorola’s FCG (MC68836) Used with ML6673 for 100BASE-TX solutions 44-pin PLCC package.
This Part Is End Of Life As Of August 1, 2000 BLOCK.

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Other Datasheets by Micro Linear

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Published: May 7, 2005 |