SY100S838 - CLOCK GENERATION CHIP

Micrel Semiconductor

Datasheet Details

Part number	SY100S838
Manufacturer	Micrel Semiconductor
File Size	504.05 KB
Description	CLOCK GENERATION CHIP
Datasheet	SY100S838_MicrelSemiconductor.pdf

The SY100S838/L is a low skew (÷1, ÷2/3) or (÷2, ÷4/ 6) clock generation chip designed explicitly for low skew clock generation applications.

3.3V and 5V power supply options.
50ps output-to-output skew.
Synchronous enable/disable.
Master Reset for synchronization.
Internal 75KΩ input pull-down resistors.
Available in 20-pin SOIC package TRUTH TABLE CLK EN ZL ZZ H XX NOTES: Z = LOW-to-HIGH transition ZZ = HIGH-to-LOW transition MR L L H Function Divide Hold Q0.
3 Reset Q0.
3 FSEL L L H H DIVSEL L H L H Q0, Q1.

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Published: Apr 30, 2007 |