Datasheet4U Logo Datasheet4U.com

MN101C49G - MN101 Series microcontroller

Download the MN101C49G datasheet PDF. This datasheet also covers the MN101C28 variant, as both devices belong to the same mn101 series microcontroller family and are provided as variant models within a single manufacturer datasheet.

Features

  • q Efficiency of C-based ROM code: Assembler rate 1 or less q High-speed instruction processing: 63 ns (32 MHz) q Linear address space: 1 MB q Identical architecture for 32- and 16-bit microcomputers q Option functions Hardware task switching (Max. 4 task) 16-bit multiplication ROM collection s.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MN101C28_MatsushitaElectric.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number MN101C49G
Manufacturer Matsushita Electric
File Size 2.57 MB
Description MN101 Series microcontroller
Datasheet download datasheet MN101C49G Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
MN101C49G MICROCOMPUTER LSI User Manual Panasonic
MN101C49 Microcomputers / Controllers Panasonic
MN101C49H MICROCOMPUTER LSI User Manual Panasonic
MN101C49K Microcomputers / Controllers Panasonic
MN101C49K MICROCOMPUTER LSI User Manual Panasonic

Other Datasheets by Matsushita Electric

Part Number Description
MN101C49H MN101 Series microcontroller
MN101C49K MN101 Series microcontroller
MN101C425 MN101 Series microcontroller
MN101C427 MN101 Series microcontroller
MN101C457 MN101 Series microcontroller

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Sheet4U.com AM1 (MN101) Series AM1 (MN101) Series The AM1 Series of 8-bit microcomputers is the realization of developments in C programming. Because of the 8-bit architecture, which allows half-byte instruction sets and offers other advantages, assembler ROM code size can be reduced. They are compact and consume little power, but feature a shortest instruction processing time of 63 ns (5 V). They can be used in a wide variety of applications where cost performance is a demand. Features q Efficiency of C-based ROM code: Assembler rate 1 or less q High-speed instruction processing: 63 ns (32 MHz) q Linear address space: 1 MB q Identical architecture for 32- and 16-bit microcomputers q Option functions Hardware task switching (Max.
Published: |