MACH435-12 Datasheet (Lattice) - High-Density EE CMOS Programmable Logic

MACH435-12, High-Density EE CMOS Programmable Logic

FINAL COM’L: -12/15/20, Q-20/25 MACH435-12/15/20, Q-20/25 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS s 84 Pins in PLCC s 128 Macrocells s 12 ns tPD s 83.3 MHz fCNT s 70 Inputs with pull-up resistors s 64 Outputs s 192 Flip-flops 128 Macrocell flip-flops 64 Input flip-flops s Up to 20 product terms per function, with XOR Lattice Semiconductor s Flexible clocking Four global clock pins with selectable edges Asynchronous mode avai

MACH435-12 Features

* that the PAL22V10 does not provide. The MACH435 consists of eight PAL blocks interconnected by a programmable central switch matrix. The central switch matrix connects the PAL blocks to each other and to all input pins, providing a high degree of connectivity between the fully-connected PAL blocks.