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ISPL1048E-100LT - High-Density Programmable Logic

Description

The ispLSI 1048E is a High-Density Programmable Logic Device containing 288 Registers, 96 Universal I/O pins, 12 Dedicated Input pins, four Dedicated Clock Input pins, two dedicated Global OE input pins, and a Global Routing Pool (GRP).

Features

  • HIGH.

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Datasheet preview – ISPL1048E-100LT

Datasheet Details

Part number ISPL1048E-100LT
Manufacturer Lattice Semiconductor
File Size 158.25 KB
Description High-Density Programmable Logic
Datasheet download datasheet ISPL1048E-100LT Datasheet
Additional preview pages of the ISPL1048E-100LT datasheet.

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Full PDF Text Transcription

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ispLSI 1048E ® High-Density Programmable Logic Features • HIGH DENSITY PROGRAMMABLE LOGIC — 8,000 PLD Gates — 96 I/O Pins, Twelve Dedicated Inputs — 288 Registers — High-Speed Global Interconnects — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc. — Small Logic Block Size for Random Logic — Functionally and Pin-out Compatible to ispLSI 1048C TECHNOLOGY • HIGH PERFORMANCE — fmax = 125 MHz Maximum Operating Frequency — tpd = 7.
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