ISP1016E Datasheet (Lattice Semiconductor) - High-Density Programmable Logic

ISP1016E, High-Density Programmable Logic

The ispLSI and pLSI 1016E are High-Density Programmable Logic Devices containing 96 Registers, 32 Universal I/O pins, four Dedicated Input pins, three Dedicated Clock Input pins, one Global OE input pin and a Global Routing Pool (GRP).

The GRP provides complete interconnectivity between all of these

ISP1016E Features

* HIGH-DENSITY PROGRAMMABLE LOGIC

* 2000 PLD Gates

* 32 I/O Pins, Four Dedicated Inputs

* 96 Registers

* High-Speed Global Interconnect

* Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.

* Small Logic Block Size for R