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C5002 Low Skew Muliple Frequency PCI Clock Generator with EMI Reducing SSCG

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Description

C5002 Low Skew Multiple Frequency PCI Clock Generator with EMI Reducing SSCG Approved Product Product .
Pin Number 2 Pin Name XIN PWR VDDA I/O I Description This pin is the connection point for the devices Loop reference frequency.

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Datasheet Specifications

Part number
C5002
Manufacturer
International
File Size
127.01 KB
Datasheet
C5002_International.pdf
Description
Low Skew Muliple Frequency PCI Clock Generator with EMI Reducing SSCG

Features

* Produces PCI output clocks that are individually selectable for 33.3 or 66.6 MHz under SMBus or strapping control. Separate output buffer power supply for reduced noise, crosstalk and jitter. input clock frequency standard 14.31

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