80960SA Datasheet (Intel Corporation) - EMBEDDED 32-BIT MICROPROCESSOR

80960SA, EMBEDDED 32-BIT MICROPROCESSOR

80960SA EMBEDDED 32-BIT MICROPROCESSOR WITH 16-BIT BURST DATA BUS s High-Performance Embedded s Pin Compatible with 80960SB s Built-in Interrupt Controller Architecture 20 MIPS Burst Execution at 20 MHz 7.5 MIPS Sustained Execution at 20 MHz s 512-Byte On-Chip Instruction Cache Direct Mapped Parallel Load/Decode for Uncached Instructions s Multiple Register Sets Sixteen Global 32-Bit Registers Sixteen Local 32-Bit Registers

80960SA Features

* 2 1.1.1 Memory Space And Addressing Modes 4 1.1.2 Data Types 4 1.1.3 Large Register Set 4 1.1.4 Multiple Register Sets 5 1.1.5 Instruction Cache 6 1.1.6 Register Scoreboarding 6 1.1.7 High Bandwidth Bus 6 1.1.8 Interrupt Handling 6 1.1.9 Debug Features 6 1.1.10 Fault Detection 7 1.1.11 Built-in Te