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ICS8312 - 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER

Datasheet Summary

Description

Solutions from IDT.

The ICS8312 single-ended clock input accepts LVCMOS or LVTTL input levels.

Features

  • Twelve LVCMOS/LVTTL outputs.
  • CLK input supports the following input types: LVCMOS, LVTTL.
  • Maximum output frequency: 250MHz.
  • Output skew: 150ps (maximum).
  • Supply modes: Core/Output 3.3V/3.3V 3.3V/2.5V 3.3V/1.8V 2.5V/2.5V 2.5V/1.8V 1.8V/1.8V.
  • 0°C to 85°C ambient operating temperature.
  • Available in both standard (RoHS 5) and lead-free (RoHS 6) packages Block Diagram CLK_EN Pullup D Q LE CLK Pulldown OE Pullup 12 Q[0:11] IDT™ / I.

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Datasheet preview – ICS8312

Datasheet Details

Part number ICS8312
Manufacturer Integrated Device Technology
File Size 1.08 MB
Description 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER
Datasheet download datasheet ICS8312 Datasheet
Additional preview pages of the ICS8312 datasheet.

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Full PDF Text Transcription

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LOW SKEW, 1-TO-12 LVCMOS/LVTTL FANOUT BUFFER General Description The ICS8312 is a low skew, 1-to-12 LVCMOS/ ICS LVTTL Fanout Buffer and a member of the HiPerClockS™ HiPerClockS™ family of High Performance Clock Solutions from IDT. The ICS8312 single-ended clock input accepts LVCMOS or LVTTL input levels. The low impedance LVCMOS outputs are designed to drive 50Ω series or parallel terminated transmission lines. The effective fanout can be increased from 12 to 24 by utilizing the ability of the outputs to drive two series terminated lines. The ICS8312 is characterized at full 3.3V, 2.5V, and 1.8V, mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating supply modes. Guaranteed output and part-to-part skew characteristics along with the 1.
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