ICS571 Low Phase Noise Zero Delay Buffer

Integrated Circuit Systems

Description

www.DataSheet4U.com PRELIMINARY INFORMATION ICS571 Low Phase Noise Zero Delay Buffer .
The ICS571 is a high speed, high output drive, low phase noise Zero Delay Buffer (ZDB) which integrates ICS’ proprietary analog/digital Phase Locked L.

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Datasheet Specifications

Part number: ICS571
Manufacturer: Integrated Circuit Systems
File Size: 85.70 KB
Datasheet: ICS571_IntegratedCircuitSystems.pdf
Description: Low Phase Noise Zero Delay Buffer

Features

* Packaged in 8 pin SOIC.
* Can function as low phase noise x2 multiplier.
* Low skew outputs. One is ÷2 of other.
* Input clock frequency up to 160 MHz at 3.3V.
* Phase noise of better than -100 dBc/Hz from 1kHz to 1MHz offset from carrier
* Can recov

Applications

* Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not auth

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ICS571 Low Phase Noise Zero Delay Buffer Integrated Circuit Systems

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