SEMB10 Datasheet (Infineon Technologies AG) - PNP Silicon Digital Transistor Array Preliminary data

SEMB10, PNP Silicon Digital Transistor Array Preliminary data

SEMB10 PNP Silicon Digital Transistor Array Preliminary data Switching circuit, inverter, interface circuit, driver circuit Two ( galvanic) internal isolated Transistors with good matching in one package Built in bias resistors ( R1=2,2kΩ, R2 =47kΩ) C1 6 B2 5 E2 4 4 5 3 6 1 2 R2 R1 TR1 R2 1 E1 2 B1 3 C2 EHA07173 TR2 R1 Type SEMB10 Maximum Ratings Parameter Marking W5 Pin Configuration Package 1=E1 2=B1 3=C2 4=E2 5=B2 6=C1 SOT666 Symbol VCEO VCBO VEBO Vi(on) I