IS61QDPB44M18B Datasheet (ISSI) - 72Mb QUADP SYNCHRONOUS SRAM

IS61QDPB44M18B, 72Mb QUADP SYNCHRONOUS SRAM

The 72Mb IS61QDPB42M36B/B1/B2 and IS61QDPB44M18B/B1/B2 are synchronous, highperformance CMOS static random access memory (SRAM) devices.

These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround.

The rising edge of K clock initiates the read/write operation, and all internal

IS61QDPB44M18B Features

* 2Mx36 and 4Mx18 configuration available.

* On-chip Delay Locked Loop (DLL) for wide data valid window.

* Separate independent read and write ports with concurrent read and write operations.

* Synchronous pipeline read with late write operation.

* Double Data Rate (DDR) interfac