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IS61QDPB24M18A 72Mb QUADP (Burst 2) Synchronous SRAM

IS61QDPB24M18A Description

IS61QDPB24M18A/A1/A2 IS61QDPB22M36A/A1/A2 4Mx18, 2Mx36 72Mb QUADP (Burst 2) Synchronous SRAM (2.5 CYCLE READ LATENCY) AUGUST 2014 .
at page 6 for each ODT option.

IS61QDPB24M18A Features

* 2Mx36 and 4Mx18 configuration available.
* On-chip Delay-Locked Loop (DLL) for wide data valid window.
* Separate independent read and write ports with concurrent read and write operations.
* Synchronous pipeline read with EARLY write operation.
* Double Data Rate (DDR) interfa

IS61QDPB24M18A Applications

* where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance

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Datasheet Details

Part number
IS61QDPB24M18A
Manufacturer
ISSI
File Size
607.77 KB
Datasheet
IS61QDPB24M18A-ISSI.pdf
Description
72Mb QUADP (Burst 2) Synchronous SRAM

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72Mb QUADP Burst Synchronous SRAM ISSI
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