IS61QDB41M36 Datasheet (ISSI) - 36 Mb (1M x 36 & 2M x 18) QUAD (Burst of 4) Synchronous SRAMs

IS61QDB41M36, 36 Mb (1M x 36 & 2M x 18) QUAD (Burst of 4) Synchronous SRAMs

The 36Mb IS61QDB41M36 and IS61QDB42M18 are synchronous, high-performance CMOS static random access memory (SRAM) devices.

These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround.

The rising edge of K clock initiates the read/write operation, and all internal operations are

IS61QDB41M36 Features

* 1M x 36 or 2M x 18.

* On-chip delay-locked loop (DLL) for wide data valid window.

* Separate read and write ports with concurrent read and write operations.

* Synchronous pipeline read with late write operation.

* Double data rate (DDR) interface for read an