PZ5032-10A44 32 Macrocell PLD

Description

Construction Analysis Philips PZ5032-10A44 32 Macrocell PLD Report Number: SCA 9611-501 ® INTEGRATED CIRCUIT ENGINEERING CORPORATION 15022 N.75th .
Assembly Die Process ANALYSIS RESULTS I Assembly ANALYSIS RESULTS II Die Process TABLES Procedure Overall Quality Evaluation Package Markings Wirebond.

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Datasheet Specifications

Part number: PZ5032-10A44
Manufacturer: INTEGRATED CIRCUIT ENGINEERING
File Size: 5.50 MB
Datasheet: PZ5032-10A44-INTEGRATEDCIRCUITENGINEERING.pdf
Description: 32 Macrocell PLD

Features

* Twin-well CMOS process in an N substrate (no epi).
* Sub-micron gate lengths (0.35 micron N-channel and 0.4 micron P-channel).
* Tungsten plugs used under all metal layers. 1These items present possible quality or reliability concerns. They should be discussed with the m

Applications

* The leadframe was constructed of copper and plated externally with tin-lead solder and internally with silver.
* Lead-locking provisions (anchors) were present at all leads for added package strength.
* Die separation was by sawing (full depth). Silver-filled polyimide was

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PZ5032-10A44 Macrocell PLD INTEGRATED CIRCUIT ENGINEERING

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