IN74HCT109A Datasheet (IK Semiconductor) - Dual J-K Positive-Edge-Triggered Flip-Flop

IN74HCT109A, Dual J-K Positive-Edge-Triggered Flip-Flop

TECHNICAL DATA IN74HCT109A Dual J-K Flip-Flop with set and Reset High-Performance Silicon-Gate CMOS The IN74HCT109A is identical in pinout to the LS/ALS109.

The IN74HCT109A may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.

This device consists of two J-K flip-flops with individual set, reset, and clock inputs.

Changes at the inputs are reflected at the outputs with the next low-to-high transition of the clock.

Both Q to Q outputs are available from