IN74ACT112 Datasheet (IK Semiconductor) - Dual J-K Negative-Edge-Triggered Flip-Flop

IN74ACT112, Dual J-K Negative-Edge-Triggered Flip-Flop

TECHNICAL DATA IN74ACT112 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT112 is identical in pinout to the LS/ALS112, HC/HCT112.

The IN74ACT112 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.

Each flip-flop is negative-edge clocked and has active-low asynchronous Set and Reset inputs.

TTL/NMOS Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Ra