Description
CMOS SUPERSYNC FIFO™ 32,768 x 18 65,536 x 18 Integrated Device Technology, Inc.PRELIMINARY IDT72275 IDT72285 .
The IDT72275/72285 are exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls.
Features
* Choose among the following memory organizations: IDT72275 32,768 x 18 IDT72285 65,536 x 18
* Pin-compatible with the IDT72255LA/72265LA SuperSync FIFOs
* 10ns read/write cycle time (6.5ns access time)
* Fixed, low first word data latency time
* Auto power d
Applications
* that need to buffer large amounts of data. The input port is controlled by a Write Clock (WCLK) input and a Write Enable (WEN ) input. Data is written into the FIFO on every rising edge of WCLK when WEN is asserted. The output port is controlled by a Read Clock (RCLK) input and Read Enable (REN ) in
